Friday, April 21, 2006
The title is a misnomer actually. I was thinking that, although there are many approaches, true system level design is an illusion. That is because, when we are thinking of implementing systems, we have to think in terms of the known - be it algorithms or hardware. So there is no 'real' system level thinking.
If that is the case, a true hardware software codesign tool should involve just an expert system- a humungus database of all known good designs - we specify the system in terms of functionalities implemented (either in software or hardware) and the tool will search the database, offer us options based on cost/performance and we just select the best fit for our budget.
One of the problems in the above is - there is no real source for all this data - the tool vendors like Synopsys have their libraries for simple functionalities - adders, MACs or FFTs even? But with so many domains and differing implementations (design-wise and the modes of implementation - FPGA, Structured ASIC or ASIC, single, multi or vector processor etc) we will need many, many experts to make such a database.
And even if we manage to get them all together, they won't be able to share their knowledge as the companies they designed for would have non-disclosure agreements. Maybe all professors could collaborate? I guess not. And fair enouigh - after all, the world won't stop rotating just because the ideal H-S co-design could not be built.
May the experiments carry on! ¶ 2:23 AM
If that is the case, a true hardware software codesign tool should involve just an expert system- a humungus database of all known good designs - we specify the system in terms of functionalities implemented (either in software or hardware) and the tool will search the database, offer us options based on cost/performance and we just select the best fit for our budget.
One of the problems in the above is - there is no real source for all this data - the tool vendors like Synopsys have their libraries for simple functionalities - adders, MACs or FFTs even? But with so many domains and differing implementations (design-wise and the modes of implementation - FPGA, Structured ASIC or ASIC, single, multi or vector processor etc) we will need many, many experts to make such a database.
And even if we manage to get them all together, they won't be able to share their knowledge as the companies they designed for would have non-disclosure agreements. Maybe all professors could collaborate? I guess not. And fair enouigh - after all, the world won't stop rotating just because the ideal H-S co-design could not be built.
May the experiments carry on! ¶ 2:23 AM
